Integrated circuits such as processors and memory devices typically communicate with each other using digital data signals and clock signals. Some systems use “clock forwarding” schemes where a device that sources digital data signals also sources the associated clock signal. The clock signal is then used at the receiving device to clock the received data.
FIG. 1 shows a prior art system with clock forwarding. System 100 includes integrated circuits 110 and 150 interconnected by conductors 120 and 122. Integrated circuit 110 includes drivers 112 and 114 to drive a digital data signal on conductor 120 and a clock signal on conductor 122, respectively. Integrated circuit 150 includes receiver 152 to receive the digital data signal, and receiver 154 to receive the clock signal. Integrated circuit 150 also includes sequential element 156 to clock the data signal using the clock signal.
The various signal paths shown in integrated circuit 150 are subject to signal propagation delays, some of which may vary with temperature and power supply voltage variations. For example, propagation delay variations may occur in receivers 152 and 154 and the signal lines providing the clock and data to sequential element 156. The clock signal line is shown having coupling to ground, and the data signal line is shown having delay resulting from additional buffers. In general, propagation delay may be introduced in any clock or data path by a variety of means.
Variations in propagation delay can cause “skew” between the clock and data signals. For example, the phase of the clock signal may advance or delay relative the phase of the data signal. If the skew becomes too great, then the clock signal may not reliably clock the data signal into sequential element 156.